Intel’s CPU roadmap: Aggressive tech advances spur power efficiency

With CPU design shifting to an emphasis on improved performance per watt, Intel has followed suit. On Thursday, Intel updated its CPU roadmap with an emphasis on maximizing power efficiency.

In a presentation by Dr. Ann Kelleher, executive vice president and general manager of technology development for Intel, the company stepped through its upcoming technology transitions, explaining them in terms of how much power each new processor will consume. Intel held an investor day Thursday afternoon to offer Wall Street a deeper look at its business.

Low power is now a growing focus in the chip industry, with rival AMD making it a priority with the Ryzen 6000 Mobile chip. Arm chips have always focused on power efficiency.

Intel began talking about its new manufacturing technology language last summer, when the company began moving away from descriptions of process technology (like “10nm”) to more abstract descriptions of the process technology itself. The current 12th-gen Core chip, “Alder Lake,” is manufactured and shipping on the Intel 7 process technology, for example. According to Kelleher, Alder Lake improves 10 percent in terms of performance per watt.

After years of stagnating on 14nm technology, however, Intel has committed to aggressive technology shifts over the next few years. This fall, Intel will launch Meteor Lake, the first chip manufactured on the Intel 4 technology, and the first use of Extreme Ultraviolet (EUV) technology by Intel, seen as a necessary step toward next-generation manufacturing technologies. According to Intel, the Meteor Lake client processor will offer a further 20 percent improvement in performance per watt. The Meteor Lake CPU tile will tape out in the second half of 2022, Intel said. (Intel hasn’t said when Meteor Lake will ship.)

Intel didn’t announce a client (PC) processor that will ship in Intel 3, the next-gen manufacturing technology. Instead, Intel said that an undisclosed Xeon processor will be manufactured on that process, and will offer an 18 percent improvement on performance per watt. That Xeon will begin being tested in the second half of 2022 with test wafers.

In 2024, Intel will begin moving to what it calls “the angstrom era,” beginning with another future client processor. It’s here, Intel said, that we’ll begin to see Intel’s “gate all around” (GAA) design, or RibbonFET, as well as the PowerVia technology to improve power efficiency. “Gate-all-around” essentially creates nanowires through the chip. 

In the first half of 2024, a PC processor will begin using Intel’s 20A process, the first process of the “Angstrom era.” Here, Intel expects the chip will offer an additional 15 percent in terms of performance per watt, versus the prior generation. Again, Intel says that the first 20A test wafers of this chip will begin emerging from the fab in 2024.

Intel is moving quickly here too. In the second half of 2024, Intel said it expects a client processor to roll out on the new 18A process in the second half of 2024. The client processor will offer up to 10 percent improvement in terms of performance per watt, Kelleher said. In addition to the client processor, there will also be a Xeon processor and a foundry customer operating on the 18A process.

Intel’s packaging technology is moving forward as well. In 2019, Intel announced its Foveros technology, to allow die disaggregation and allow many to fit within a single package. Foveros Omni will take what’s called the “die disaggregation” portion of Foveros and extend that vertically—basically, it will give Intel more tools to mix and match performance cores and low-power cores together inside of the same chip. A second technique, called Foveros Direct, will add direct copper-to-copper bonding for even lower electrical resistance, and thus performance. Intel said Thursday that it believes that Foveros Omni and Foveros Direct will both be manufacturing ready in the second half of 2023.

Intel chief executive Pat Gelsinger has said that he intends that Intel will remain the steward of Moore’s Law, the axiom that transistor counts double every 18 months. Gelsinger’s first takeaway from the investor conference was that Intel should return to “Grove-ian” levels of execution, reminiscent of former chief executive Andy Grove. Gelsinger said he believes that Intel can achieve putting 1 trillion transistors on a chip package by 2030.

“Until the periodic table is exhausted, we’re not done,” Gelsinger said.

This story was updated at 1:46 PM with additional comments from Pat Gelsinger, Intel’s chief executive.